Implemented data rearrangement function for multi-tap line camera
Camera Control
Supports PIRANHA3 camera (default)
CC1: EXSYNC output
CC2: PRIN output
CC3: Reserved (unused)
CC4: Reserved (unused)
Capable of CC5 to CC8 output (same signals as CC1 to CC4)
Encoder
RS-422 digital interface (A/B/Z phase)
Internal trigger, external trigger, count start by Z phase
Built-in 32-bit counter
Built-in 32-bit and 16-bit comparators (one set each)
Generates image capture trigger or line trigger when comparator matched
Input frequency: Up to 1MHz (when the duty is 50%)
System bus
PCI-X Rev1.0b 64bit/133MHz
FIFO Memory
128Mbyte
Interrupt
Capable of generation at the end of DMA and the start of capture (#INTA)
Power Requirement
+5V: 3A +3.3V: 1A (Max)
Environment
Temperature: 0°C to 50°C
Humidity : 35% to 85% (non-condensing)
Dimension
224.0(W)×106.68mm(D), Panel Width 20mm
Weight
180g
Software Environment
Windows XP compatible drivers and “C” library
This board is designed for PCI-X bus only. Be careful, it does not operate if installed on PCI bus. This board does not support PCI-X 66. Install this board in PCI-X 133 or PCI-X 100 slot.
